diff --git a/blinking_led.sv b/blinking_led.sv
new file mode 100644
index 0000000..1eed44e
--- /dev/null
+++ b/blinking_led.sv
@@ -0,0 +1,30 @@
+module blinking_led (
+    input  logic clk,
+    input  logic rst,
+    input  logic short,
+    output logic led
+  );
+
+  logic [26:0] count;
+  logic led_long, led_short;
+
+  // up-counter 
+  // resets itself every 100 million clock cycles (1 sec with a 100 MHz clock)
+  always_ff @(posedge clk) begin
+    if (rst)
+      count <= 0;
+    else
+      if (count >= 100_000_000 - 1)
+        count <= 0;
+      else
+        count <= count + 1;
+  end
+
+  // derive 0.5 sec and 0.25 sec pulses from counter
+  assign led_long  = (count < 50_000_000);
+  assign led_short = (count < 25_000_000);
+  
+  // choose which pulse to display on LED based on signal "short"
+  assign led = short ? led_short : led_long;
+
+endmodule
\ No newline at end of file
diff --git a/blinking_led_tb.sv b/blinking_led_tb.sv
new file mode 100644
index 0000000..038531b
--- /dev/null
+++ b/blinking_led_tb.sv
@@ -0,0 +1,18 @@
+`timescale 1 ns/ 1 ps
+
+module blinking_led_tb ();
+  
+  logic clk = 1'b1, rst = 1'b1, short = 1'b0, led;
+  
+  always begin
+    #5 clk = ~clk;
+  end
+  
+  initial begin
+    #20         rst   = 1'b0;
+    #1000000000 short = 1'b1;
+  end
+
+  blinking_led dut(.*);
+
+endmodule
\ No newline at end of file
diff --git a/entities.zip b/entities.zip
new file mode 100644
index 0000000..7709b04
Binary files /dev/null and b/entities.zip differ
diff --git a/manualLineFollower.pdf b/manualLineFollower.pdf
new file mode 100644
index 0000000..a89ea80
Binary files /dev/null and b/manualLineFollower.pdf differ
diff --git a/motorcontrol_tb.sv b/motorcontrol_tb.sv
new file mode 100644
index 0000000..1151585
--- /dev/null
+++ b/motorcontrol_tb.sv
@@ -0,0 +1,29 @@
+`timescale 1ns/1ps
+
+module motorcontrol_tb();
+
+   logic clk;
+   logic reset;
+   logic direction;
+   logic [20:0] count;
+   logic pwm;
+
+   timebase test1 (clk, reset, count);
+
+   motorcontrol test2 (clk, reset, direction, count, pwm);
+
+   always
+      #5 clk = ~clk;  // period 10ns (100 MHz)
+   initial
+      clk = 0;
+
+   initial begin
+                reset = 1; direction = 0;       
+     #10;       reset = 0; 
+     #19999990; reset = 1; direction = 1;
+     #10;       reset = 0;
+     #19999990; reset = 1;                              
+     #10;       reset = 0;
+   end
+
+endmodule
diff --git a/robot.xdc b/robot.xdc
new file mode 100644
index 0000000..5950ba9
--- /dev/null
+++ b/robot.xdc
@@ -0,0 +1,318 @@
+## This file is the constraints file for the Robot.
+## It is based on the general .xdc for
+## the Basys3 rev B board by Digilent.
+## To use it in a project:
+## - uncomment the lines corresponding to used pins
+## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
+
+## Clock signal
+set_property PACKAGE_PIN W5 [get_ports clk]
+set_property IOSTANDARD LVCMOS33 [get_ports clk]
+create_clock -period 10.000 -name sys_clk_pin -waveform {0.000 5.000} -add [get_ports clk]
+
+
+###
+### The signals below are specific for the Mars Rover
+###
+
+### Header JA, servo connections
+set_property PACKAGE_PIN J1 [get_ports motor_r_pwm]
+set_property IOSTANDARD LVCMOS33 [get_ports motor_r_pwm]
+set_property PACKAGE_PIN L2 [get_ports motor_l_pwm]
+set_property IOSTANDARD LVCMOS33 [get_ports motor_l_pwm]
+
+### Header JXADC, sensor connections
+set_property PACKAGE_PIN J3 [get_ports sensor_r_in]
+set_property IOSTANDARD LVCMOS33 [get_ports sensor_r_in]
+set_property PACKAGE_PIN L3 [get_ports sensor_m_in]
+set_property IOSTANDARD LVCMOS33 [get_ports sensor_m_in]
+set_property PACKAGE_PIN M2 [get_ports sensor_l_in]
+set_property IOSTANDARD LVCMOS33 [get_ports sensor_l_in]
+
+
+## Switches
+#set_property PACKAGE_PIN V17 [get_ports {sw[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[0]}]
+#set_property PACKAGE_PIN V16 [get_ports {sw[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[1]}]
+#set_property PACKAGE_PIN W16 [get_ports {sw[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[2]}]
+#set_property PACKAGE_PIN W17 [get_ports {sw[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[3]}]
+#set_property PACKAGE_PIN W15 [get_ports {sw[4]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[4]}]
+#set_property PACKAGE_PIN V15 [get_ports {sw[5]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[5]}]
+#set_property PACKAGE_PIN W14 [get_ports {sw[6]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[6]}]
+#set_property PACKAGE_PIN W13 [get_ports {sw[7]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[7]}]
+#set_property PACKAGE_PIN V2 [get_ports {sw[8]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[8]}]
+#set_property PACKAGE_PIN T3 [get_ports {sw[9]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[9]}]
+#set_property PACKAGE_PIN T2 [get_ports {sw[10]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[10]}]
+#set_property PACKAGE_PIN R3 [get_ports {sw[11]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[11]}]
+#set_property PACKAGE_PIN W2 [get_ports {sw[12]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[12]}]
+#set_property PACKAGE_PIN U1 [get_ports {sw[13]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[13]}]
+#set_property PACKAGE_PIN T1 [get_ports {sw[14]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[14]}]
+#set_property PACKAGE_PIN R2 [get_ports {sw[15]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {sw[15]}]
+
+
+## LEDs
+#set_property PACKAGE_PIN U16 [get_ports {leds[0]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[0]}]
+#set_property PACKAGE_PIN E19 [get_ports {leds[1]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[1]}]
+#set_property PACKAGE_PIN U19 [get_ports {leds[2]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[2]}]
+#set_property PACKAGE_PIN V19 [get_ports {leds[3]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[3]}]
+#set_property PACKAGE_PIN W18 [get_ports {leds[4]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[4]}]
+#set_property PACKAGE_PIN U15 [get_ports {leds[5]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[5]}]
+#set_property PACKAGE_PIN U14 [get_ports {leds[6]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[6]}]
+#set_property PACKAGE_PIN V14 [get_ports {leds[7]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[7]}]
+#set_property PACKAGE_PIN V13 [get_ports {leds[8]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[8]}]
+#set_property PACKAGE_PIN V3 [get_ports {leds[9]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[9]}]
+#set_property PACKAGE_PIN W3 [get_ports {leds[10]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[10]}]
+#set_property PACKAGE_PIN U3 [get_ports {leds[11]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[11]}]
+#set_property PACKAGE_PIN P3 [get_ports {leds[12]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[12]}]
+#set_property PACKAGE_PIN N3 [get_ports {leds[13]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[13]}]
+#set_property PACKAGE_PIN P1 [get_ports {leds[14]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[14]}]
+#set_property PACKAGE_PIN L1 [get_ports {leds[15]}]
+#	set_property IOSTANDARD LVCMOS33 [get_ports {leds[15]}]
+
+
+##7 segment display
+#set_property PACKAGE_PIN W7 [get_ports {seg[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[0]}]
+#set_property PACKAGE_PIN W6 [get_ports {seg[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[1]}]
+#set_property PACKAGE_PIN U8 [get_ports {seg[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[2]}]
+#set_property PACKAGE_PIN V8 [get_ports {seg[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[3]}]
+#set_property PACKAGE_PIN U5 [get_ports {seg[4]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[4]}]
+#set_property PACKAGE_PIN V5 [get_ports {seg[5]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[5]}]
+#set_property PACKAGE_PIN U7 [get_ports {seg[6]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {seg[6]}]
+
+#set_property PACKAGE_PIN V7 [get_ports dp]
+#set_property IOSTANDARD LVCMOS33 [get_ports dp]
+
+#set_property PACKAGE_PIN U2 [get_ports {an[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {an[0]}]
+#set_property PACKAGE_PIN U4 [get_ports {an[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {an[1]}]
+#set_property PACKAGE_PIN V4 [get_ports {an[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {an[2]}]
+#set_property PACKAGE_PIN W4 [get_ports {an[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {an[3]}]
+
+
+##Buttons
+#set_property PACKAGE_PIN T18 [get_ports btnU]
+#set_property IOSTANDARD LVCMOS33 [get_ports btnU]
+#set_property PACKAGE_PIN W19 [get_ports btnL]
+#set_property IOSTANDARD LVCMOS33 [get_ports btnL]
+#set_property PACKAGE_PIN T17 [get_ports btnR]
+#set_property IOSTANDARD LVCMOS33 [get_ports btnR]
+#set_property PACKAGE_PIN U17 [get_ports btnD]
+#set_property IOSTANDARD LVCMOS33 [get_ports btnD]
+
+##Pmod Header JA
+##Sch name = JA1
+#set_property PACKAGE_PIN J1 [get_ports {JA[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[0]}]
+##Sch name = JA2
+#set_property PACKAGE_PIN L2 [get_ports {JA[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[1]}]
+##Sch name = JA3
+#set_property PACKAGE_PIN J2 [get_ports {JA[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[2]}]
+##Sch name = JA4
+#set_property PACKAGE_PIN G2 [get_ports {JA[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[3]}]
+##Sch name = JA7
+#set_property PACKAGE_PIN H1 [get_ports {JA[4]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[4]}]
+##Sch name = JA8
+#set_property PACKAGE_PIN K2 [get_ports {JA[5]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[5]}]
+##Sch name = JA9
+#set_property PACKAGE_PIN H2 [get_ports {JA[6]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[6]}]
+##Sch name = JA10
+#set_property PACKAGE_PIN G3 [get_ports {JA[7]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JA[7]}]
+
+
+
+##Pmod Header JB
+##Sch name = JB1
+#set_property PACKAGE_PIN A14 [get_ports {JB[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[0]}]
+##Sch name = JB2
+#set_property PACKAGE_PIN A16 [get_ports {JB[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[1]}]
+##Sch name = JB3
+#set_property PACKAGE_PIN B15 [get_ports {JB[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[2]}]
+##Sch name = JB4
+#set_property PACKAGE_PIN B16 [get_ports {JB[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[3]}]
+##Sch name = JB7
+#set_property PACKAGE_PIN A15 [get_ports {JB[4]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[4]}]
+##Sch name = JB8
+#set_property PACKAGE_PIN A17 [get_ports {JB[5]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[5]}]
+##Sch name = JB9
+#set_property PACKAGE_PIN C15 [get_ports {JB[6]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[6]}]
+##Sch name = JB10
+#set_property PACKAGE_PIN C16 [get_ports {JB[7]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JB[7]}]
+
+
+
+##Pmod Header JC
+##Sch name = JC1
+#set_property PACKAGE_PIN K17 [get_ports {JC[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[0]}]
+##Sch name = JC2
+#set_property PACKAGE_PIN M18 [get_ports {JC[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[1]}]
+##Sch name = JC3
+#set_property PACKAGE_PIN N17 [get_ports {JC[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[2]}]
+##Sch name = JC4
+#set_property PACKAGE_PIN P18 [get_ports {JC[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[3]}]
+##Sch name = JC7
+#set_property PACKAGE_PIN L17 [get_ports {JC[4]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[4]}]
+##Sch name = JC8
+#set_property PACKAGE_PIN M19 [get_ports {JC[5]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[5]}]
+##Sch name = JC9
+#set_property PACKAGE_PIN P17 [get_ports {JC[6]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[6]}]
+##Sch name = JC10
+#set_property PACKAGE_PIN R18 [get_ports {JC[7]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JC[7]}]
+
+
+##Pmod Header JXADC
+##Sch name = XA1_P
+#set_property PACKAGE_PIN J3 [get_ports {JXADC[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[0]}]
+##Sch name = XA2_P
+#set_property PACKAGE_PIN L3 [get_ports {JXADC[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[1]}]
+##Sch name = XA3_P
+#set_property PACKAGE_PIN M2 [get_ports {JXADC[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[2]}]
+##Sch name = XA4_P
+#set_property PACKAGE_PIN N2 [get_ports {JXADC[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[3]}]
+##Sch name = XA1_N
+#set_property PACKAGE_PIN K3 [get_ports {JXADC[4]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[4]}]
+##Sch name = XA2_N
+#set_property PACKAGE_PIN M3 [get_ports {JXADC[5]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[5]}]
+##Sch name = XA3_N
+#set_property PACKAGE_PIN M1 [get_ports {JXADC[6]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[6]}]
+##Sch name = XA4_N
+#set_property PACKAGE_PIN N1 [get_ports {JXADC[7]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {JXADC[7]}]
+
+
+
+##VGA Connector
+#set_property PACKAGE_PIN G19 [get_ports {vgaRed[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[0]}]
+#set_property PACKAGE_PIN H19 [get_ports {vgaRed[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[1]}]
+#set_property PACKAGE_PIN J19 [get_ports {vgaRed[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[2]}]
+#set_property PACKAGE_PIN N19 [get_ports {vgaRed[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaRed[3]}]
+#set_property PACKAGE_PIN N18 [get_ports {vgaBlue[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[0]}]
+#set_property PACKAGE_PIN L18 [get_ports {vgaBlue[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[1]}]
+#set_property PACKAGE_PIN K18 [get_ports {vgaBlue[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[2]}]
+#set_property PACKAGE_PIN J18 [get_ports {vgaBlue[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaBlue[3]}]
+#set_property PACKAGE_PIN J17 [get_ports {vgaGreen[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[0]}]
+#set_property PACKAGE_PIN H17 [get_ports {vgaGreen[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[1]}]
+#set_property PACKAGE_PIN G17 [get_ports {vgaGreen[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[2]}]
+#set_property PACKAGE_PIN D17 [get_ports {vgaGreen[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {vgaGreen[3]}]
+#set_property PACKAGE_PIN P19 [get_ports Hsync]
+#set_property IOSTANDARD LVCMOS33 [get_ports Hsync]
+#set_property PACKAGE_PIN R19 [get_ports Vsync]
+#set_property IOSTANDARD LVCMOS33 [get_ports Vsync]
+
+
+##USB-RS232 Interface
+#set_property PACKAGE_PIN B18 [get_ports RsRx]
+#set_property IOSTANDARD LVCMOS33 [get_ports RsRx]
+#set_property PACKAGE_PIN A18 [get_ports RsTx]
+#set_property IOSTANDARD LVCMOS33 [get_ports RsTx]
+
+
+##USB HID (PS/2)
+#set_property PACKAGE_PIN C17 [get_ports PS2Clk]
+#set_property IOSTANDARD LVCMOS33 [get_ports PS2Clk]
+#set_property PULLUP true [get_ports PS2Clk]
+#set_property PACKAGE_PIN B17 [get_ports PS2Data]
+#set_property IOSTANDARD LVCMOS33 [get_ports PS2Data]
+#set_property PULLUP true [get_ports PS2Data]
+
+
+##Quad SPI Flash
+##Note that CCLK_0 cannot be placed in 7 series devices. You can access it using the
+##STARTUPE2 primitive.
+#set_property PACKAGE_PIN D18 [get_ports {QspiDB[0]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[0]}]
+#set_property PACKAGE_PIN D19 [get_ports {QspiDB[1]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[1]}]
+#set_property PACKAGE_PIN G18 [get_ports {QspiDB[2]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[2]}]
+#set_property PACKAGE_PIN F18 [get_ports {QspiDB[3]}]
+#set_property IOSTANDARD LVCMOS33 [get_ports {QspiDB[3]}]
+#set_property PACKAGE_PIN K19 [get_ports QspiCSn]
+#set_property IOSTANDARD LVCMOS33 [get_ports QspiCSn]
+
+
+set_property BITSTREAM.CONFIG.CONFIGRATE 33 [current_design]
+set_property CONFIG_MODE SPIx4 [current_design]
+
+set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
diff --git a/robot_tb.sv b/robot_tb.sv
new file mode 100644
index 0000000..78e608a
--- /dev/null
+++ b/robot_tb.sv
@@ -0,0 +1,39 @@
+`timescale 1ns/1ps
+
+module robot_tb();
+
+   logic clk;
+   logic reset;
+   logic sensor_l;
+   logic sensor_m;
+   logic sensor_r;
+   logic [2:0] sensors;
+   logic motor_l_pwm, motor_r_pwm;
+
+   robot test (clk, reset, sensor_l, sensor_m, sensor_r, 
+                                motor_l_pwm, motor_r_pwm);
+
+   assign {sensor_l, sensor_m, sensor_r} = sensors;
+
+   always
+      #5ns clk = ~clk;  // period 10ns (100 MHz)
+   initial
+      clk = 0;
+
+   initial begin
+     #0ms;  reset = 1; 
+     #40ms; reset = 0; 
+   end
+
+   initial begin
+     #0ms;  sensors = 3'b000; 
+     #70ms; sensors = 3'b001; 
+     #40ms; sensors = 3'b010; 
+     #40ms; sensors = 3'b011; 
+     #40ms; sensors = 3'b100; 
+     #40ms; sensors = 3'b101; 
+     #40ms; sensors = 3'b110; 
+     #40ms; sensors = 3'b111; 
+   end
+
+endmodule
diff --git a/timebase_tb.sv b/timebase_tb.sv
new file mode 100644
index 0000000..2243c55
--- /dev/null
+++ b/timebase_tb.sv
@@ -0,0 +1,22 @@
+
+`timescale 1ns/1ps
+
+module timebase_tb();
+
+   logic clk;
+   logic reset;
+   logic [20:0] count;
+
+   timebase test (clk, reset, count);
+
+   always
+      #5 clk = ~clk;
+   initial
+      clk = 0;
+
+   initial begin
+          reset = 1; 
+     #10; reset = 0; 
+   end
+
+endmodule